Architecture Overview

Introduction

microGPU is a functional model designed to simulate the execution flow of a modern GPU. The hierarchy follows a standard SIMT (Single Instruction, Multiple Threads) structure.

Hardware Hierarchy

• ComputeUnit (CU): The primary processing block. It contains the logic to execute warps in a round-robin fashion.
• Warp: A group of threads that execute the same instruction in lock-step.
• Thread: The smallest unit of execution, containing its own register state and program counter.

Execution Flow

1. Warps are created in a global collection.
2. The scheduler assigns Warps to an available ComputeUnit.
3. The ComputeUnit cycles through its assigned Warps, advancing their pipeline stages.